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Sigrity Technologies
Overview
High-tech companies developing complex chips, packages, and boards grapple with power and signal integrity issues arising from rapid increases in IC speed and data transmission rates combined with decreases in power supply voltages and denser, smaller geometries. At the same time, higher I/O counts, multiple stacked chips and packages, and greater electrical performance constraints are making IC package physical designs more complex.
Breakthrough Cadence® solutions, based on patented and proprietary Sigrity™ technologies, can help you overcome these challenges. These solutions target complete power delivery system analyses across chips, packages, and boards; system-level signal integrity (SI) analysis, including simultaneous switching noise (SSN) analysis of high-speed signal transmissions; and, advanced physical design for single- and multi-chip packages, state-of-the-art 3D packages, and systems-in-package (SiPs).
Power Integrity
Cadence® power integrity (PI) solutions, based on Sigrity™ technology, provide signoff-level accuracy for AC and DC power analysis of PCBs and IC packages. Each tool seamlessly interfaces with Cadence Allegro® PCB and IC packaging physical design solutions.
Sigrity PowerSI
An advanced signal integrity, power integrity, and design-stage EMI solution. Supports S-parameter model extraction and provides robust frequency domain simulation for entire IC package and PCB designs.
Learn more
»
Sigrity PowerDC
An efficient DC signoff solution for IC package and PCB designs, with electrical/thermal co-simulation to maximize accuracy. Quickly pinpoints IR drop and current hotspots. Automatically finds best remote sense locations.
Learn more
»
Sigrity OptimizePI
A highly automated board and IC package AC frequency analysis solution. Supports pre-and post-layout decap studies, identifies impedance issues, and suggests placement locations for EMI decaps. Decap implementations are optimized for performance and cost.
Learn more
»
Power-Aware SI
Cadence® power-aware signal integrity (SI) tools, based on Sigrity™ technology, provide signoff-level accurate SI analysis for PCBs and IC packages. Signoff-level SI accuracy of signals with frequency higher than one gigahertz must consider the signals and the power/ground network that enables the current return path. Cadence Power-Aware SI tools interface seamlessly with Cadence Allegro® PCB and IC packaging physical design tools to create a complete power-aware design and SI analysis solution.
Sigrity SPEED2000
A complete PCB/package layout-based time domain EM simulation tool for signal integrity, power integrity, and design-stage EMI analysis. Supports advanced layout checking for design signoff and debug.
Learn more
»
Sigrity SystemSI
A comprehensive and automated signal integrity environment for the accurate assessment of high-speed chip-to-chip system designs. Ensures robust parallel bus and serial link interface implementations.
Learn more
»
Sigrity Broadband SPICE
A combination of S-parameter checking, tuning, and extraction capability to convert N-port network parameters to efficient SPICE-compatible circuits that can be used in time domain simulations.
Learn more
»
Sigrity Transistor-to-behavioral Model Conversion (T2B)
Transistor-to-behavioral model conversion is an efficient way to create accurate models for SSO and other simulations. These models run an order of magnitude faster than the original transistor models.
Learn more
»
Package Design/Assessment
Cadence® package design and assessment tools, based on Sigrity™ technology, provide IC package design, analysis, and model extraction capability—and can exchange data with Cadence SiP Layout and Allegro® Package Designer. Assessment capabilities allow you to quickly spot potential signal and power integrity issues. Model extraction capabilities provide unique full package model extraction with accuracy into the multi-gigahertz frequency range.
Sigrity Unified Package Designer (UPD)
Unified Package Designer is a versatile package design environment. Supports a broad range of wirebond, flip-chip, and leadframe packages including single-die BGAs and SiP implementations.
Learn more
»
Sigrity XtractIM
A fast IC package RLC extraction and assessment solution with an option to generate highly accurate broadband models. Supports a broad range of package types including BGA, SiP, and leadframe designs.
Learn more
»
Co-Design
Sigrity™ co-design products complement the Cadence® SiP co-design solution by providing early system prototyping and co-analysis capability. They enable coordinated chip-package-board planning for system optimization resulting in shorter cycle–times and maximum performance. The results and output of these products will serve as starting point for physical implementation.
Sigrity OrbitIO
A co-design solution for rapid system prototyping and pad ring planning in single/multi-die package configurations. Supports flip-chip, wirebond, and RDL feasibility using industry-standard data from IC, package, and PCB tools.
Learn more
»
Sigrity XcitePI
A full-chip power integrity solution targeting chip/system co-simulation applications. Supports early chip power planning, I/O and core power model extraction, and simulation in both time and frequency domains.
Learn more
»
Sigrity Broadband SPICE
A combination of S-parameter checking, tuning, and extraction capability to convert N-port network parameters to efficient SPICE-compatible circuits that can be used in time domain simulations.
Learn more
»
Sigrity OptimizePI
A highly automated board and IC package AC frequency analysis solution. Supports pre-and post-layout decap studies, identifies impedance issues, and suggests placement locations for EMI decaps. Decap implementations are optimized for performance and cost.
Learn more
»
Sigrity OrbitIO
A co-design solution for rapid system prototyping and pad ring planning in single/multi-die package configurations. Supports flip-chip, wirebond, and RDL feasibility using industry-standard data from IC, package, and PCB tools.
Learn more
»
Sigrity PowerDC
An efficient DC signoff solution for IC package and PCB designs, with electrical/thermal co-simulation to maximize accuracy. Quickly pinpoints IR drop and current hotspots. Automatically finds best remote sense locations.
Learn more
»
Sigrity PowerSI
An advanced signal integrity, power integrity, and design-stage EMI solution. Supports S-parameter model extraction and provides robust frequency domain simulation for entire IC package and PCB designs.
Learn more
»
Sigrity SPEED2000
A complete PCB/package layout-based time domain EM simulation tool for signal integrity, power integrity, and design-stage EMI analysis. Supports advanced layout checking for design signoff and debug.
Learn more
»
Sigrity SystemSI
A comprehensive and automated signal integrity environment for the accurate assessment of high-speed chip-to-chip system designs. Ensures robust parallel bus and serial link interface implementations.
Learn more
»
Sigrity Transistor-to-behavioral Model Conversion (T2B)
Transistor-to-behavioral model conversion is an efficient way to create accurate models for SSO and other simulations. These models run an order of magnitude faster than the original transistor models.
Learn more
»
Sigrity Unified Package Designer (UPD)
Unified Package Designer is a versatile package design environment. Supports a broad range of wirebond, flip-chip, and leadframe packages including single-die BGAs and SiP implementations.
Learn more
»
Sigrity XcitePI
A full-chip power integrity solution targeting chip/system co-simulation applications. Supports early chip power planning, I/O and core power model extraction, and simulation in both time and frequency domains.
Learn more
»
Sigrity XtractIM
A fast IC package RLC extraction and assessment solution with an option to generate highly accurate broadband models. Supports a broad range of package types including BGA, SiP, and leadframe designs.
Learn more
»
Content Query Web Part [2]
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Why Cadence Bought Sigrity – And How it May Change PCB Analysis
Cadence Acquires Sigrity, a Leader in High-Speed PCB and IC Packaging Analysis
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